DESCRIPTION

The M54/74HC373/533 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with in silicon gate C2MOS technology.

These ICs achive the high speed operation similar to equivalent LSTTL while maintaning the CMOS low power dissipation.

The application designer has a choise of combination of inverting and non inverting outputs.

The three state output configuration and the wide choise of outline make bus organized system simple.

All inputs are equipped with protection circuits against discharge and transient excess voltage.

■ HIGH SPEED tPD = 11 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION ICC = 4 μA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE IOL = ?IOH?= 6 mA (MIN.)

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS373/533

M74HC373TTR屬于集成電路（IC） > 鎖存器。意法半導(dǎo)體（ST）集團制造生產(chǎn)的M74HC373TTR鎖存器鎖存器是類似于觸發(fā)器的基本數(shù)字存儲設(shè)備，但是不同之處在于，在鎖存使能（或類似命名）信號處于有效邏輯狀態(tài)的任何時間，保持的邏輯狀態(tài)都可以改變?！巴该鳌辨i存器還允許設(shè)備輸出在鎖存使能信號有效時反映輸入的當(dāng)前狀態(tài)，而相反的是，狀態(tài)僅在保持狀態(tài)已固定時改變。