DESCRIPTION

The M54/74HC4049 and the M54/74HC4050 are high speed CMOS HEX BUFFER fabricated in silicon gate C2MOS technology.

They have the same high speed performance of LSTTL combined with true CMOS low power consumption. The M54/75HC4049 is an inverting buffer, while the M54/74HC4050 is a non-inverting buffer.

The internal circuit is composed of 3 stage or 2- stage inverters, which provides high noise immunity and a stable output.

Input protection circuits are different from those of the high speed CMOS IC’s.

■ HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION ICC = 1 μA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 6 mA (MIN.)

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 4049B/4050B

M74HC4050RM13TR屬于集成電路（IC） > 緩沖器，驅動器，接收器，收發(fā)器。意法半導體（ST）集團制造生產(chǎn)的M74HC4050RM13TR緩沖器，驅動器，接收器，收發(fā)器邏輯緩沖器、驅動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅動負載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進行隔離通信。