M95640-WDW3TG/P中文資料意法半導體數(shù)據(jù)手冊PDF規(guī)格書

SUMMARY DESCRIPTION

These electrically erasable programmable memory (EEPROM) devices are accessed by a high speed SPI-compatible bus. The memory array is organized as 8192 x 8 bit (M95640), and 4096 x 8 bit (M95320).

FEATURES SUMMARY

■ Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes)

■ Single Supply Voltage:

– 4.5 to 5.5V for M95xxx

– 2.5 to 5.5V for M95xxx-W

– 1.8 to 5.5V for M95xxx-R

■ 10MHz, 5MHz or 2MHz clock rate (depending on ordering options)

■ 5ms or 10ms Write Time (depending on ordering options)

■ Status Register

■ Hardware Protection of the Status Register

■ BYTE and PAGE WRITE (up to 32 Bytes)

■ Self-Timed Programming Cycle

■ Adjustable Size Read-Only EEPROM Area

■ Enhanced ESD Protection

■ More than 100,000 or 1 million Erase/Write Cycles (depending on ordering options)

■ More than 40 Year Data Retention