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MACH210A-12JC中文資料萊迪思數(shù)據(jù)手冊PDF規(guī)格書
MACH210A-12JC規(guī)格書詳情
GENERAL DESCRIPTION
The MACH210 is a member of the high-performance EE CMOS MACH 2 device family. This device has approximately six times the logic macrocell capability of the popular PAL22V10 without loss of speed.
DISTINCTIVE CHARACTERISTICS
■ 44 Pins
■ 64 Macrocells
■ 7.5 ns tPD Commercial
12 ns tPD Industrial
■ 133 MHz fCNT
■ 38 Inputs; 210A Inputs have built-in pull-up
resistors
■ Peripheral Component Interconnect (PCI)
compliant
■ 32 Outputs
■ 64 Flip-flops; 2 clock choices
■ 4 “PAL22V16” blocks with buried macrocells
■ Pin-compatible with MACH110, MACH111,
MACH211, and MACH215
產(chǎn)品屬性
- 型號:
MACH210A-12JC
- 制造商:
LATTICE
- 制造商全稱:
Lattice Semiconductor
- 功能描述:
High-Density EE CMOS Programmable Logic
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---|---|---|---|---|---|---|---|
AMD |
23+ |
PLCC |
13000 |
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23+ |
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8560 |
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詢價 | ||
AMD |
23+ |
PLCC44 |
50000 |
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詢價 | ||
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23+ |
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詢價 | |||
AMD |
21+ |
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12588 |
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詢價 | ||
AMD |
24+ |
3000 |
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詢價 | |||
AMD |
PLCC44 |
68900 |
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22+ |
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詢價 |