MACH445-15YC中文資料萊迪思數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The MACH445 is a member of the high-performance EE CMOS MACH 4 family. This device has approximately twelve times the macrocell capability of the popular PAL22V10, with significant density and functional features that the PAL22V10 does not provide. It is architecturally identical to the MACH435, with the addition of JTAG and 5-V programming features.

DISTINCTIVE CHARACTERISTICS

■ 100-pin version of the MACH435 in PQFP

■ 5 V, in-circuit programmable

■ JTAG, IEEE 1149.1 JTAG testing capability

■ 128 macrocells

■ 12 ns tPD

■ 83 MHz fCNT

■ 70 inputs with pull-up resistors

■ 64 outputs

■ 192 flip-flops

— 128 macrocell flip-flops

— 64 input flip-flops

■ Up to 20 product terms per function, with XOR

■ Flexible clocking

— Four global clock pins with selectable edges

— Asynchronous mode available for each macrocell

■ 8 “PAL33V16” blocks

■ Input and output switch matrices for high routability

■ Fixed, predictable, deterministic delays

■ JEDEC-file compatible with MACH435

■ Zero-hold-time input register option