MB90F882SPMC中文資料富士通數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

■ DESCRIPTION

The MB90880 series is a general-purpose 16-bit microcontroller, designed by Fujitsu, for process control of devices such as consumer appliances, which require high-speed real-time processing capabilities.

The instruction set of the F2MC-16LX CPU core retains the same AT architecture as the F2MC*1 family, with further refinements including high-level language instructions, an expanded addressing mode, enhanced multiplierdivider instructions and bit processing. In addition, a 32-bit accumulator is built in to enable long word processing.

■ FEATURES

? Clock

Minimum instruction execution time :

30.3 ns / 4.125 MHz source oscillation × eight times

(in internal operation : 33 MHz/3.3 V ± 0.3 V)

PLL clock multiplication system

? Maximum memory space

16 Mbytes

? Instruction set optimized for control applications

Supported data types : bit, byte, word and long word

Standard addressing modes : 23 types

Enhanced high-precision calculation realized by 32-bit accumulator

Signed multiplication/division instructions and extended RETI instruction functions

? Instruction set supporting high-level language (C language) and multi-task operations

Introduction of system stack pointer

Symmetrical instruction set and barrel shift instructions

? Improved execution speed

4-byte queue

? Powerful interrupt functions

Eight priority levels programmable; External interrupts : 24

? Data transfer functions (μDMAC)

Up to 16 channels

? Built-in ROM

Flash ROM : 256, 384 and 512 Kbytes; MASK ROM : 256, 384 and 512 Kbytes

? Built-in RAM

Flash RAM : 16, 24 and 30 Kbytes; MASK RAM : 16, 24 and 30 Kbytes

? General-purpose ports

Dual clock product : up to 81 channels; Single clock product : up to 83 channels

? A/D converter

RC successive approximation conversion type : 20 channels (Resolution : 8 or 10 bits)

? Multi-function serial interface

7 channels (software switchable between for SIO, UART and I2C)

? 16-bit PPG

8 channels

? 8/16-bit up-down counter/timer

Event input pins : 6

8-bit up-down counters : 2

8-bit reload/compare registers : 2

? Base timer

4 channels (software switchable between 16-bit reload timer, PWC timer, PPG timer, and PWM timer)

? 16-bit I/O timer

Input capture × 2 channels, output compare × 6 channels, free run timer × 1 channel

? Built-in dual clock generator

? Low power consumption modes

Stop mode, sleep mode, CPU intermittent operation mode, watch timer, time base timer mode

? Package

QFP-100/LQFP-100

? Process

CMOS technology

? Power supply voltage

3V : Single power supply operation