MB90V340E-101中文資料富士通數據手冊PDF規(guī)格書

■ DESCRIPTION

The MB90340E series with up to 2 FULL-CAN interfaces is especially designed for automotive and other industrial applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach.

The power to the MCU core (3 V) is supplied by a built-in regulator circuit, giving these microcontrollers superior performance in terms of power consumption and tolerance to EMI.

■ FEATURES

? CPU

? Instruction system best suited to controller

- Wide choice of data types (bit, byte, word, and long word)

- Wide choice of addressing modes (23 types)

- Enhanced functionality with signed multiply and divide instructions and the RETI instruction

- Enhanced high-precision computing with 32-bit accumulator

? Instruction system compatible with high-level language (C language) and multitask

- Employing system stack pointer

- Various enhanced pointer indirect instructions

- Barrel shift instructions

? Increased processing speed

- 4-byte instruction queue

? Serial interface

? LIN-UART : 4 channels

- Equipped with full-duplex double buffer

- Clock-asynchronous or clock-synchronous serial transmission is available

? I2C interface : 2 channels (only for devices with a C suffix in the part number)

- Up to 400 kbps transfer rate

? Interrupt controller

? Powerful 8-level, 34-condition interrupt feature

? Up to 16 external interrupts are supported

? Automatic data transfer function independent of CPU

- Expanded intelligent I/O service function (EI2OS) : up to 16 channels

? I/O ports

? General-purpose input/output port (CMOS output)

- 80 ports (for devices without an S suffix in the part number - i.e. devices that support the sub clock)

- 82 ports (for devices with an S suffix in the part number - i.e. devices that do not support the sub clock)

? 8/10-bit A/D converter

? 16 channels (only for devices without a C suffix in the part number)

? 24 channels (only for devices with a C suffix in the part number)

? Resolution is selectable between 8-bit and 10-bit.

? Activation by external trigger input is allowed.

? Conversion time : 3 μs (at 24 MHz machine clock, including sampling time)

? Address match detection (program patch) function

? Detects address matches against 6 address pointers

? Timer

? Time-base timer, watch timer, watchdog timer : 1 channel

? 8/16-bit PPG timer : 8-bit × 16 channels, or 16-bit × 8 channels

? 16-bit reload timer : 4 channels

? 16-bit input/output timer

- 16-bit free-run timer : 2 channels

(FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)

- 16-bit input capture: (ICU): 8 channels

- 16-bit output compare: (OCU): 8 channels

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