MB90V495中文資料富士通數(shù)據(jù)手冊PDF規(guī)格書

OUTLINE

The MB90495-series with FULL-CAN interface and FLASH ROM is especially designed for automotive and industrial applications. Its main feature is the on-chip CAN Interface, which conforms to V2.0 Part A and Part B, while supporting a very flexible message buffer scheme, including 8 message buffers, and so offering more functions than a normal full CAN approach.

FEATURES

? 16-bit core CPU; 4MHz external clock (16 MHz internal, 62.5 ns instruction cycle time)

? 32kHz Subsystem Clock

? 0.5 mm CMOS Technology

? Internal voltage regulator supports 3V MCU core, offering low EMI and low power consumption figures

? 64 KB FLASH ROM; supports automatic programming, 10.000 erase cycles, 10 year data retention time and no second programming voltage required

? 2 KB static RAM

? FULL-CAN interface; conforming to Version 2.0 Part A and Part B, flexible message buffering (mailbox and FIFO buffering can be mixed)

? 2 UART’s; both offering synchronous communication modes.

? Powerful interrupt functions (8 programmable priority levels; 8 external interrupts)

? I/O Timer

? A/D Converter: 8 channel analogue inputs (Resolution 10 bits or 8 bits)

? ICU (Input capture) 16bit * 4ch

? PPG (Programmable Pulse Generator) 16bit * 2ch; Can be configured as 8bit * 4ch

? Optimised instruction set for controller applications (bit, byte, word and long-word data types; 23 different addressing modes; barrel shift; variety of pointers)

? 4-byte instruction execution queue

? Signed multiply (16bit*16bit) and divide (32bit/16bit) instructions available

? Program Patch Function

? Fast Interrupt processing

? 16-bit reload timer: 2 channels

? Low Power Consumption - Several different Lo-Power modes: (Sleep, Stop, Watch,...)

? Package: QFP-64; 12mm x 12mm body, 0.65mm pin pitch

QFP-64; 20mm x 18mm body, 1.0mm pin pitch