MBM30LV0128中文資料富士通數(shù)據(jù)手冊PDF規(guī)格書

■ DESCRIPTION

The MBM30LV0128 device is a single 3.3 V 16 M × 8 bit NAND flash memory organized as 528 byte × 32 pages × 1024 blocks. Each 528 byte page contains 16 bytes of optionally selected spare area which may be used to store ECC code (Specifications indicated are on condition that ECC system would be combined) . Program and read data is transferred between the memory array and page register in 528 byte increments. A 528 byte page can be programmed in 200 μs and an 16 K byte block can be erased in 2 ms under typical conditions. An internal controller automates all programs and erases operations including the verification of data margins.

■ FEATURES

? 3.3 V-only operating voltage (2.7 V to 3.6 V)

Minimizes system level power requirements

? Organization

Memory Cell Array : (16 M + 512 K) × 8 bit

Data Register : (512 + 16) × 8 bit

? Automatic Program and Erase

Page Program : (512 + 16) Byte

Block Erase : (16 K + 512) Byte

? 528 Byte Page Read Operation

Random Access : 10 μs (Max.)

Serial Access : 35 ns (Max.)

? Fast Program and Erase

Program Time : 200 μs (Typ.) / page

Block Erase Time : 2 ms (Typ.) / block

? Command/Address/Data Multiplexed I/O Port

? Hardware Data Protection

? 1,000,000 write/erase cycles guaranteed (ECC system required)

? Command Register Operation

? Package

48-pin TSOP Type I (0.5 mm pitch)

Normal/Reverse Type

? Data Retention : 10 years