MC100LVEL56集成電路（IC）的信號開關(guān)多路復(fù)用器解碼器規(guī)格書PDF中文資料

MC100LVEL56屬于集成電路（IC）的信號開關(guān)多路復(fù)用器解碼器。由安森美半導(dǎo)體公司制造生產(chǎn)的MC100LVEL56信號開關(guān)，多路復(fù)用器，解碼器邏輯型信號開關(guān)、多路復(fù)用器和編碼器 IC 可用于對以數(shù)字格式表示數(shù)據(jù)的電信號進(jìn)行路由和選擇。這些器件與設(shè)計用于模擬信號的類似產(chǎn)品有所不同，它們保留的信息表示為兩個電狀態(tài)之一，而不是兩個外部界限內(nèi)的無窮變化量。

Description

The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals.

The device features both individual and common select inputs to address both data path and random logic applications.

The differential inputs have special circuitry which ensures device stability under open input conditions. When both differential inputs are left open the D input will pull down to VEE, The D input will bias around VCC/2 forcing the Q output LOW.

The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01μF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

Features

? 580 ps Typical Propagation Delays

? Separate and Common Select

? The 100 Series Contains Temperature Compensation

? PECL Mode Operating Range:

VCC = 3.0 V to 3.8 V with VEE = 0 V

? NECL Mode Operating Range:

VCC = 0 V with VEE = ?3.0 V to ?3.8 V

? Internal Input Pulldown Resistors on D(s), SEL(s), and COM_SEL

? Q Output will Default LOW with Inputs Open or at VEE

? These Devices are Pb-Free, Halogen Free and are RoHS Compliant