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MC14042BFR2中文資料安森美半導體數據手冊PDF規(guī)格書

MC14042BFR2
廠商型號

MC14042BFR2

功能描述

Quad Transparent Latch

文件大小

174.58 Kbytes

頁面數量

8

生產廠商 ON Semiconductor
企業(yè)簡稱

ONSEMI安森美半導體

中文名稱

安森美半導體公司官網

原廠標識
數據手冊

下載地址一下載地址二原廠數據手冊到原廠下載

更新時間

2024-11-16 17:10:00

MC14042BFR2規(guī)格書詳情

The MC14042B Quad Transparent Latch is constructed with MOS P?channel and N?channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches can be reversed using the polarity input. Information present at the data input is transferred to outputs Q and Q during the clock level which is determined by the polarity input. When the polarity input is in the logic “0” state, data is transferred during the low clock level, and when the polarity input is in the logic “1” state the transfer occurs during the high clock level.

Features

? Buffered Data Inputs

? Common Clock

? Clock Polarity Control

? Q and Q Outputs

? Double Diode Input Protection

? Supply Voltage Range = 3.0 Vdc to 1 8 Vdc

? Capable of Driving Two Low?power TTL Loads or One Low?power

Schottky TTL Load Over the Rated Temperature Range

? Pb?Free Packages are Available*

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