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MC14049B_V01中文資料安森美半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書

MC14049B_V01
廠商型號(hào)

MC14049B_V01

功能描述

Hex Buffer

文件大小

241.27 Kbytes

頁(yè)面數(shù)量

8 頁(yè)

生產(chǎn)廠商 ON Semiconductor
企業(yè)簡(jiǎn)稱

ONSEMI安森美半導(dǎo)體

中文名稱

安森美半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-18 17:08:00

MC14049B_V01規(guī)格書詳情

The MC14049B Hex Inverter/Buffer and MC14050B Noninverting

Hex Buffer are constructed with MOS P?Channel and N?Channel

enhancement mode devices in a single monolithic structure. These

complementary MOS devices find primary use where low power

dissipation and/or high noise immunity is desired. These devices

provide logic level conversion using only one supply voltage, VDD.

The input?signal high level (VIH) can exceed the VDD supply

voltage for logic level conversions. Two TTL/DTL loads can be driven

when the devices are used as a CMOS?to?TTL/DTL converter

(VDD = 5.0 V, VOL ≤ 0.4 V, IOL ≥ 3.2 mA).

Note that pins 13 and 16 are not connected internally on these

devices; consequently connections to these terminals will not affect

circuit operation.

Features

? High Source and Sink Currents

? High?to?Low Level Converter

? Supply Voltage Range = 3.0 V to 18 V

? VIN can exceed VDD

? Meets JEDEC B Specifications

? Improved ESD Protection On All Inputs

? NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC?Q100

Qualified and PPAP Capable

? These Devices are Pb?Free and are RoHS Compliant

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