MC33004B中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

These circuits are high speed J–FET input quad operational amplifiers incorporating well matched, high voltage J–FET and bipolar transistors in a monolithic integrated circuit.

The devices feature high slew rates, low input bias and offset current, and low offset voltage temperature coefficient.

■ LOW POWER CONSUMPTION

■ WIDE COMMON-MODE (UP TO VCC+) AND DIFFERENTIAL VOLTAGE RANGE

■ LOW INPUT BIAS AND OFFSET CURRENT

■ OUTPUT SHORT-CIRCUIT PROTECTION

■ HIGH INPUT IMPEDANCE J–FET INPUT STAGE

■ INTERNAL FREQUENCY COMPENSATION

■ LATCH UP FREE OPERATION

■ HIGH SLEW RATE : 16V/μs (typ)