MC68HC05T2中文資料恩智浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

Features

? Popular M68HC05 CPU ? Memory-Mapped I/O Registers ? 15,120 Bytes of User ROM ? 320 Bytes of User SRAM ? 29 Bidirectional I/O Pins and One Input-Only Pin Synchronous Serial I/O Port (SIOP) Programmable On-Screen Display (OSD) ? Nine-Channel Pulse-Length Modulation D/A Converter (Mask Optional Open Drain Outputs) ? 6-Bit, Single-Channel A/D Converter Fully Static Operation (No Minimum Clock Speed) ? On-Chip Oscillator with Crystal/Ceramic Resonator Connections ? 16-Bit Capture/Compare Timer ? Self-Check Mode ? Power-Saving STOP and WAIT Modes ? Single 5.0-Volt Power Requirement ? 8 x 8 Unsigned Multiply Instruction Edge-Sensitive or Edge- and Level-Sensitive Interrupt Trigger (Mask Option) ? Most Significant Bit (MSB) First or Least Significant Bit (LSB) First SIOP Data Format (Mask Option) ? Computer Operating Properly (COP) Timer (Mask Option) ? 40-Pin Dual In-Line Package (DIP) ? 44-Pin Plastic Leaded Chip Carrier (PLCC)