MC68HC908GR60A中文資料飛思卡爾數(shù)據(jù)手冊PDF規(guī)格書

General Description

Introduction

The MC68HC908GR60A, MC68HC908GR48A, and MC68HC908GR32A are members of the low-cost, high-performance M68HC08 Family of 8-bit microcontroller units (MCUs). All MCUs in the family use the enhanced M68HC08 central processor unit (CPU08) and are available with a variety of modules, memory sizes and types, and package types.

Features

For convenience, features have been organized to reflect:

? Standard features

? Features of the CPU08

Standard Features

Features of the MC68HC908GR60A include:

? High-performance M68HC08 architecture optimized for C-compilers

? Fully upward-compatible object code with M6805, M146805, and M68HC05 Families

? 8-MHz internal bus frequency

? Clock generation module supporting 1-MHz to 8-MHz crystals

? FLASH program memory security(1)

? On-chip programming firmware for use with host personal computer which does not require high voltage for entry

? In-system programming (ISP)

? System protection features:

– Optional computer operating properly (COP) reset

– Low-voltage detection with optional reset and selectable trip points for 3.3-V and 5.0-V operation

– Illegal opcode detection with reset

– Illegal address detection with reset

? Low-power design; fully static with stop and wait modes

? Standard low-power modes of operation:

– Wait mode

– Stop mode

? Master reset pin and power-on reset (POR)

? On-chip FLASH memory:

– MC68HC908GR60A — 60 Kbytes

– MC68HC908GR48A — 48 Kbytes

– MC68HC908GR32A — 32 Kbytes

? Random-access memory (RAM):

– MC68HC908GR60A — 2048 bytes

– MC68HC908GR48A — 1536 bytes

– MC68HC908GR32A — 1536 bytes

? Serial peripheral interface (SPI) module

? Enhanced serial communications interface (ESCI) module

? One 16-bit, 2-channel timer interface module (TIM1) with selectable input capture, output compare, and pulse-width modulation (PWM) capability on each channel

? One 16-bit, 6-channel timer interface module (TIM2) with selectable input capture, output compare, and pulse-width modulation (PWM) capability on each channel

? Timebase module with clock prescaler circuitry for eight user selectable periodic real-time interrupts with optional active clock source during stop mode for periodic wakeup from stop using an external crystal

? 24-channel, 10-bit successive approximation analog-to-digital converter (ADC)

? 8-bit keyboard wakeup port with software selectable rising or falling edge detect, as well as high or low level detection

? Up to 53 general-purpose input/output (I/O) pins, including:

– 40 shared-function I/O pins, depending on package choice

– Up to 13 dedicated I/O pins, depending on package choice

? Selectable pullups on inputs only on ports A, C, and D. Selection is on an individual port bit basis. During output mode, pullups are disengaged.

? Internal pullups on IRQ and RST to reduce customer system cost

? High current 10-mA sink/source capability on all port pins

? Higher current 20-mA sink/source capability on PTC0–PTC4 and PTF0–PTF3

? User selectable clockout feature with divide by 1, 2, and 4 of the bus or crystal frequency

? User selection of having the oscillator enabled or disabled during stop mode

? BREAK module (BRK) to allow single breakpoint setting during in-circuit debugging

? Available packages:

– 32-pin low-profile quad flat pack (LQFP)

– 48-pin low-profile quad flat pack (LQFP)

– 64-pin quad flat pack (QFP)

? Specific features in 32-pin LQFP are:

– Port A is only 4 bits: PTA0–PTA3; shared with ADC and KBI modules

– Port B is only 6 bits: PTB0–PTB5; shared with ADC module

– Port C is only 2 bits: PTC0–PTC1

– Port D is only 7 bits: PTD0–PTD6; shared with SPI, TIM1 and TIM2 modules

– Port E is only 2 bits: PTE0–PTE1; shared with ESCI module

? Specific features in 48-pin LQFP are:

– Port A is 8 bits: PTA0–PTA7; shared with ADC and KBI modules

– Port B is 8 bits: PTB0–PTB7; shared with ADC module

– Port C is only 7 bits: PTC0–PTC6

– Port D is 8 bits: PTD0–PTD7; shared with SPI, TIM1, and TIM2 modules

– Port E is only 6 bits: PTE0–PTE5; shared with ESCI module

? Specific features in 64-pin QFP are:

– Port A is 8 bits: PTA0–PTA7; shared with ADC and KBI modules

– Port B is 8 bits: PTB0–PTB7; shared with ADC module

– Port C is only 7 bits: PTC0–PTC6

– Port D is 8 bits: PTD0–PTD7; shared with SPI, TIM1, andTIM2 modules

– Port E is only 6 bits: PTE0–PTE5; shared with ESCI module

– Port F is 8 bits: PTF0–PTF7; shared with TIM2 module

– Port G is 8 bits; PTG0–PTG7; shared with ADC module