MC68HCLLKA2CFN4中文資料恩智浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書

Features

M68HC11 Central Processing Unit (CPU)

? Power Saving STOP and WAIT Modes

768 Bytes RAM in MC68HC11 KA4, 1024 Bytes RAM in MC68HC11KA2 (Saved During Standby)

? 640 Bytes Electrically Erasable Programmable ROM (EEPROM)

? 24 Kbytes ROM/EPROM, 32 Kbytes ROM/EPROM in MC68HC11KA2

PROG Mode AlIows Use of Standard EPROM Programmer (27256 Footprint)

Nonmultiplexed Address and Data Buses

? Enhanced 16-8il Timer with Four-Stage Programmable Prescaler

- Three Input Capture (IC) Channe!s

- Four Output Compare (OC) Channels

- One Additiona! Channel, Selectable as Fourth IC or Fifth OC

8-Bit Pulse Accumulator

Four 8-8it or Two 16-8it Pulse-Width Modulation (PWM) Timer Channels

Real-Time Interrupt Circuit

Computer Operating Properly (COP) Watchdog

Enhanced Asynchronous Nonreturn to Zero (NRZ) Serial Communications Interface (SCI)

? Enhanced Synchronous Serial Peripheral Interface (SP!)

? Eight-Channel 8-8it Analog-to-Digital (AlD) Converter (Four Channels on 64-Pin Version)

Seven Bidirectional InpuVOutp? (110) Ports (43 Pins)

? One Fixed Input-Only Port (8 Pins, 4 Pins on 64-Pin Version)

Availab!e in 68-Pin Plastic Leaded Chip Carrier (Custom ROM/OTPROM), 68-Pin Windowed

Ceramic Leaded Chip Carrier (EPROM), or 64-Pin Quad Flat Pack(Custom ROM/OTPROM)