The MC74HC540A is identical in pinout to the LS540. The device inputs are compatible with Standard CMOS outputs. External pull?up resistors make them compatible with LSTTL outputs. The HC540A is an octal inverting buffer/line driver/line receiver designed to be used with 3?state memory address drivers, clock drivers, and other bus?oriented systems. This device features inputs and outputs on opposite sides of the package and two ANDed active?low output enables.

The HC540A is similar in function to the HC541A, which has noninverting outputs.

Features

? Output Drive Capability: 15 LSTTL Loads

? Outputs Directly Interface to CMOS, NMOS, and TTL

? Operating Voltage Range: 2.0 to 6.0 V

? Low Input Current: 1 A

? High Noise Immunity Characteristic of CMOS Devices

? In Compliance With the JEDEC Standard No. 7A Requirements

? Chip Complexity: 124 FETs or 31 Equivalent Gates

? Pb?Free Packages are Available*

MC74HC540AN屬于集成電路（IC） > 緩沖器，驅(qū)動器，接收器，收發(fā)器。安森美半導(dǎo)體公司制造生產(chǎn)的MC74HC540AN緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。