MC74LVX138DTR2集成電路（IC）的信號(hào)開(kāi)關(guān)多路復(fù)用器解碼器規(guī)格書(shū)PDF中文資料

MC74LVX138DTR2屬于集成電路（IC）的信號(hào)開(kāi)關(guān)多路復(fù)用器解碼器。由安森美半導(dǎo)體公司制造生產(chǎn)的MC74LVX138DTR2信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器邏輯型信號(hào)開(kāi)關(guān)、多路復(fù)用器和編碼器 IC 可用于對(duì)以數(shù)字格式表示數(shù)據(jù)的電信號(hào)進(jìn)行路由和選擇。這些器件與設(shè)計(jì)用于模擬信號(hào)的類似產(chǎn)品有所不同，它們保留的信息表示為兩個(gè)電狀態(tài)之一，而不是兩個(gè)外部界限內(nèi)的無(wú)窮變化量。

The MC74LVX138 is an advanced high speed CMOS 3?to?8 line decoder. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems.

When the device is enabled, three Binary Select inputs (A0 ? A2) determine which one of the outputs (O0 ? O7) will go Low. When enable input E3 is held Low or either E2 or E1 is held High, decoding function is inhibited and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade connection and for use as an address decoder for memory systems.

Features

? High Speed: tPD = 5.5 ns (Typ) at VCC = 3.3 V

? Low Power Dissipation: ICC = 4μA (Max) at TA = 25 °C

? Power Down Protection Provided on Inputs

? Balanced Propagation Delays

? Low Noise: VOLP = 0.5 V (Max)

? Pin and Function Compatible with Other Standard Logic Families

? Latchup Performance Exceeds 300 mA

? ESD Performance:

Human Body Model > 2000 V;

Machine Model > 200 V

? Pb?Free Packages are Available*