MCM36F8中文資料摩托羅拉數(shù)據(jù)手冊PDF規(guī)格書

1MB and 2MB Synchronous Fast Static RAM Module

The MCM36F8 (1MB) is configured as 256K x 36 bits and the MCM36F9 (2MB) is configured as 512K x 36 bits. Both are packaged in a 144–pin dual–in–line memory module (DIMM). Each module uses Motorola’s 3.3 V 256K x 18 bit flow– through BurstRAMs.

Address (A), data inputs (DQ, DP), and all control signals except output enable (G) are clock (K) controlled through positive–edge–triggered noninverting registers.

Write cycles are internally self–timed and initiated by the rising edge of the clock (K) input. This feature provides increased timing flexibility for incoming signals. Synchronous byte write (BWx) and global byte write (WE) allows writes to either individual bytes or to both bytes.

? Single 3.3 V + 10, – 5 Power Supply

? Multiple Clock Pins for Reduced Loading

? All Inputs and Outputs are LVTTL Compatible

? Byte Write and Global Write Capability

? Fast SRAM Access Times: 10 ns

? Berg Connector, Part Number: 61178–31844

? 144–Pin DIMM Module