MCM69R818AZP5中文資料摩托羅拉數(shù)據(jù)手冊PDF規(guī)格書

The MCM69R736A/818A is a 4 megabit synchronous late write fast static RAM designed to provide high performance in secondary cache and ATM switch, Telecom, and other high speed memory applications. The MCM69R818A organized as 256K words by 18 bits, and the MCM69R736A organized as 128K words by 36 bits wide are fabricated in Motorola’s high performance silicon gate BiCMOS technology.

? Byte Write Control

? Single 3.3 V +10, – 5 Operation

? HSTL – I/O (JEDEC Standard JESD8–6 Class I Compatible)

? HSTL – User Selectable Input Trip–Point

? HSTL – Compatible Programmable Impedance Output Drivers

? Register to Register Synchronous Operation

? Asynchronous Output Enable

? Boundary Scan (JTAG) IEEE 1149.1 Compatible

? Differential Clock Inputs

? Optional x 18 or x 36 organization

? MCM69R736A/818A–5 = 5 ns

MCM69R736A/818A–6 = 6 ns

MCM69R736A/818A–7 = 7 ns

MCM69R736A/818A–8 = 8 ns

? Sleep Mode Operation (ZZ Pin)

? 119 Bump, 50 mil (1.27 mm) Pitch, 14 mm x 22 mm Plastic Ball Grid Array (PBGA) Package