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MH16S64APFC-8L中文資料三菱電機數(shù)據(jù)手冊PDF規(guī)格書
MH16S64APFC-8L規(guī)格書詳情
DESCRIPTION
The MH16S64APFC is 16777216 - word by 64-bit Synchronous DRAM module. This consists of eight industry standard 8Mx16 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP.
The mounting of TSOP on a card edge Dual Inline package provides any application where high densities and large quantities of memory are required.
This is a socket type - memory modules, suitable for easy interchange or addition of modules.
FEATURES
? Utilizes industry standard 8M x 16 Sy nchronous DRAMs TSOP and industry standard EEPROM in TSSOP
? 144-pin (72-pin dual in-line package)
? single 3.3V±0.3V power supply
? Clock frequency 100MHz(max.)
? Fully synchronous operation referenced to clock rising edge
? 4 bank operation controlled by BA0,1(Bank Address)
? /CAS latency- 2/3(programmable)
? Burst length- 1/2/4/8/Full Page(programmable)
? Burst type- sequential / interleave(programmable)
? Column access - random
? Auto precharge / All bank precharge controlled by A10
? Auto refresh and Self refresh
? 4096 refresh cycle /64ms
? LVTTL Interface
APPLICATION
main memory or graphic memory in computer systems
產(chǎn)品屬性
- 型號:
MH16S64APFC-8L
- 制造商:
MITSUBISHI
- 制造商全稱:
Mitsubishi Electric Semiconductor
- 功能描述:
1,073,741,824-BIT(16,777,216 - WORD BY 64-BIT)SynchronousDRAM