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MH16S72APHB-8中文資料三菱電機(jī)數(shù)據(jù)手冊(cè)PDF規(guī)格書

MH16S72APHB-8
廠商型號(hào)

MH16S72APHB-8

功能描述

1,207,959,552-BIT (16,777,216 - WORD BY 72-BIT)Synchronous DRAM

文件大小

691.33 Kbytes

頁(yè)面數(shù)量

55 頁(yè)

生產(chǎn)廠商 Mitsubishi Electric Semiconductor
企業(yè)簡(jiǎn)稱

Mitsubishi三菱電機(jī)

中文名稱

三菱電機(jī)株式會(huì)社官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-26 19:28:00

MH16S72APHB-8規(guī)格書詳情

DESCRIPTION

The MH16S72APHB is 16777216 - word by 72-bit Synchronous DRAM module. This consists of nine industry standard 16Mx8 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP.

The mounting of TSOP on a card edge Dual Inline package provides any application where high densities and large quantities of memory are required.

This is a socket type - memory modules, suitable for easy interchange or addition of modules.

FEATURES

? Utilizes industry standard 16M x 8 Sy nchronous DRAMs TSOP and industry standard EEPROM in TSSOP

? 168-pin (84-pin dual in-line package)

? single 3.3V±0.3V power supply

? Max. Clock frequency -6:133MHz,-7,8:100MHz

? Fully synchronous operation referenced to clock rising edge

? 4 bank operation controlled by BA0,1(Bank Address)

? /CAS latency- 2/3(programmable)

? Burst length- 1/2/4/8/Full Page(programmable)

? Burst type- sequential / interleave(programmable)

? Column access - random

? Auto precharge / All bank precharge controlled by A10

? Auto refresh and Self refresh

? 4096 refresh cycle /64ms

? LVTTL Interface

? Discrete IC and module design conform to PC100/PC133 specification.

APPLICATION

PC main memory

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