MH28D72KLG-75中文資料三菱電機(jī)數(shù)據(jù)手冊(cè)PDF規(guī)格書

DESCRIPTION

The MH28D72KLG is 134217728 - word x 72-bit Double Data Rate(DDR) Synchronous DRAM mounted module.

This consists of 36 industry standard 64M x 4 DDR Synchronous DRAMs in TSOP with SSTL_2 interface which achieves very high speed data rate up to 133MHz.

This socket-type memory module is suitable for main memory in computer systems and easy to interchange or add modules.

FEATURES

- Utilizes industry standard 64M X 4 DDR Synchronous DRAMs in TSOP package , industry standard Registered Buffer in TSSOP package , and industry standard PLL in TSSOP package.

- Vdd=Vddq=2.5v ±0.2V

- Double data rate architecture; two data transfers per clock cycle

- Bidirectional, data strobe (DQS) is transmitted/received with data

- Differential clock inputs (CLK and /CLK)

- data referenced to both edges of DQS

- /CAS latency - 2.0/2.5 (programmable)

- Burst length- 2/4/8 (programmable)

- Auto precharge / All bank precharge controlled by A10

- 8192 refresh cycles /64ms

- Auto refresh and Self ref resh

- Row address A0-12 / Column address A0-9,11

- SSTL_2 Interface

- Module 2bank Configration

- Burst Ty pe - sequential/interleave(programmable)

- Commands entered on each positive CLK edge

APPLICATION

Main memory unit for PC, PC server, Server, W S.