MPC8358ECVRAGDDA中文資料恩智浦數(shù)據(jù)手冊PDF規(guī)格書

This document provides an overview of the MPC8358E

PowerQUICC II Pro processor revision 2.1 PBGA features,

including a block diagram showing the major functional

components. This device is a cost-effective, highly

integrated communications processor that addresses the

needs of the networking, wireless infrastructure, and

telecommunications markets. Target applications include

next generation DSLAMs, network interface cards for 3G

base stations (Node Bs), routers, media gateways, and high

end IADs. The device extends current PowerQUICC II Pro

offerings, adding higher CPU performance, additional

functionality, faster interfaces, and robust interworking

between protocols while addressing the requirements related

to time-to-market, price, power, and package size. This

device can be used for the control plane and also has data

plane functionality.

For functional characteristics of the processor, refer to the

MPC8360E PowerQUICC II Pro Integrated

Communications Processor Family Reference Manual,

Rev. 3.

To locate any updates for this document, refer to the

MPC8360E product summary page on our website listed on

the back cover of this document or contact your Freescale

sales office.