MPC9350集成電路（IC）的時鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料

The MPC9350 is a 2.5 V and 3.3 V compatible, PLL-based clock generator

targeted for high performance clock distribution systems. With output

frequencies of up to 200 MHz and maximum output skews of 150 ps, the

MPC9350 is ideal for the most demanding clock tree designs. The device offers

9 low skew clock outputs, with each one configurable to support the clocking

needs of the various high-performance microprocessors, including the

PowerQUICC II integrated communication microprocessor. The extended

temperature range of the MPC9350 supports telecommunication and networking

requirements. The device employs a fully differential PLL design to minimize

cycle-to-cycle and long-term jitter.

Features

? 9 Output LVCMOS PLL Clock Generator

? 25 – 200 MHz Output Frequency Range

? 2.5 V and 3.3 V Compatible

? Compatible to Various Microprocessors Such as PowerQuicc II

? Supports Networking,Telecommunications and Computer Applications

? Fully Integrated PLL

? Configurable Outputs: Divide-by-2, 4 and 8 of VCO Frequency

? Selectable Output to Input Frequency Ratio of 8:1, 4:1, 2:1 or 1:1

? Oscillator or Crystal Reference Inputs

? Internal PLL Feedback

? Output Disable

? PLL Enable/Disable

? Low Skew Characteristics: Maximum 150 ps Output-to-Output

? 32-Lead LQFP Package, Pb-Free

? Temperature Range –40?C to +85?C