MPC962305集成電路（IC）的時(shí)鐘發(fā)生器PLL頻率合成器規(guī)格書(shū)PDF中文資料

Features

? 1:5 LVCMOS zero-delay buffer (MPC962305)

? 1:9 LVCMOS zero-delay buffer (MPC962309)

? Zero input-output propagation delay

? Multiple low-skew outputs

? 250 ps max output-output skew

? 700 ps max device-device skew

? Supports a clock I/O frequency range of 10 MHz to 133 MHz,

compatible with CPU and PCI bus frequencies

? Low jitter, 200 ps max cycle-cycle, and compatible with Pentium? based

systems

? Test Mode to bypass PLL (MPC962309 only. See Table 3)

? 8-pin SOIC or 8-pin TSSOP package (MPC962305);16-pin SOIC or 16-pin

TSSOP package (MPC962309), all Pb-free

? Single 3.3 V supply

? Ambient temperature range: –40?C to +85?C

? Compatible with the CY2305, CY23S05, CY2309, CY23S09

? Spread spectrum compatible

? For drop in replacement for MPC962305 use 2305

? For drop in replacement for MPC962309 use 2309