MPR601HSU-03中文資料恩智浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書

PowerPC 601 Microprocessor Features

Major features of the 601 and 601v are as follows:

? High-performance, superscalar microprocessor

— As many as three instructions in execution per clock (one to each of the three execution units)

— Single clock cycle execution for most instructions

— Pipelined FPU for all single-precision and most double-precision operations

? Three independent execution units and two register files

? High instruction and data throughput

— Zero-cycle branch capability

— Programmable static branch prediction on unresolved conditional branches

— Instruction unit capable of fetching eight instructions per clock from the cache

— An eight-entry instruction queue that provides lookahead capability

— Interlocked pipelines with feed-forwarding that control data dependencies in hardware

— Unified 32-Kbyte cache—eight-way set-associative, physically addressed; LRU replacement algorithm