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MT5C1001DCJ-70中文資料AUSTIN數(shù)據(jù)手冊(cè)PDF規(guī)格書
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MT5C1001DCJ-70規(guī)格書詳情
GENERAL DESCRIPTION
The MT5C1001 employs low power, high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes while CMOS circuitry reduces power consumption and provides for greater reliability.
FEATURES
? High Speed: 20, 25, 35, and 45
? Battery Backup: 2V data retention
? Low power standby
? Single +5V (+10) Power Supply
? Easy memory expansion with CE and OE options.
? All inputs and outputs are TTL compatible
? Three-state output
產(chǎn)品屬性
- 型號(hào)：
MT5C1001DCJ-70
- 功能描述：
SRAM
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72 |
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MT |
20 |
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1 |
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1993 |
28 |
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76 |
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