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MX29LV800TTI-70R中文資料????????????旺宏數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

MX29LV800TTI-70R
廠商型號(hào)

MX29LV800TTI-70R

功能描述

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY

文件大小

1.24667 Mbytes

頁(yè)面數(shù)量

60 頁(yè)

生產(chǎn)廠商 Macronix International
企業(yè)簡(jiǎn)稱

MCNIX????????????旺宏

中文名稱

????????????旺宏電子官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-11-7 22:50:00

MX29LV800TTI-70R規(guī)格書(shū)詳情

GENERAL DESCRIPTION

The MX29LV800T/B is a 8-mega bit Flash memory organized as 1M bytes of 8 bits or 512K words of 16 bits. MXICs Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV800T/B is packaged in 44-pin SOP, 48-pin TSOP, and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.

FEATURES

? Extended single - supply voltage range 2.7V to 3.6V

? 1,048,576 x 8/524,288 x 16 switchable

? Single power supply operation

- 3.0V only operation for read, erase and program operation

? Fast access time: 70/90ns

? Low power consumption

- 20mA maximum active current

- 0.2uA typical standby current

? Command register architecture

- Byte/word Programming (9us/11us typical)

- Sector Erase (Sector structure 16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)

? Auto Erase (chip & sector) and Auto Program

- Automatically erase any combination of sectors with Erase Suspend capability.

- Automatically program and verify data at specified address

? Erase suspend/Erase Resume

- Suspends sector erase operation to read data from, or program data to, any sector that is not being erased, then resumes the erase.

? Status Reply

- Data polling & Toggle bit for detection of program and erase operation completion.

? Ready/Busy pin (RY/BY)

- Provides a hardware method of detecting program or erase operation completion.

? Sector protection

- Hardware method to disable any combination of sectors from program or erase operations

- Tempoary sector unprotect allows code changes in previously locked sectors.

? 100,000 minimum erase/program cycles

? Latch-up protected to 100mA from -1V to VCC+1V

? Boot Sector Architecture

- T = Top Boot Sector

- B = Bottom Boot Sector

? Low VCC write inhibit is equal to or less than 2.3V

? Package type:

- 44-pin SOP

- 48-pin TSOP

- 48-pin CSP

? Compatibility with JEDEC standard

- Pinout and software compatible with single-power supply Flash

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