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GENERAL DESCRIPTION

The Macronixs Solid State Disk controller is fully integrated flash memory controller that provides all the control logic for a PC Card ATA flash memory. The MX9691A combines 1KB dual-port buffer and buffer manager, integrated MX93011 DSP core , and a complete host interface for both the PC Card ATA and ATA standard.

FEATURES

Host Interface

? Fully compatible with PCMCIA Release 2.1, and PC Card ATA Release 1.02 specification.

? Compatible with all PC Card Services and Socket Service.

? Fast ATA host-to-buffer burst transfer rates up to 20MB/sec. which support PIO mode 4(16.6MB/sec) and DMA mode 3(16.6MB/sec).

? Automatic sensing of PCMCIA or ATA host interface.

? Integrated PCMCIA attribute memory of 256 bytes (CIS).

- CIS and Buffer RAM use same SRAM area to simplify internal bus design

? PCMCIA card configuration register support.

? Polarity control for host reset signal.

? PCMCIA twin card support.

? PCMCIA based ATA address decode support.

? Emulate the IBM task file for PC/AT.

? Separate status for Bus reset and Host program reset.

? Separate Host and Disk interrupt pins.

Flash Memory Interface

? Support all the control signals to execute read/write/erase operation for flash memory.

? Upto 32MB(unformatted) capacity for 16 pcs. 16Mbit flash memory or 64MB(unformatted) capacity for 16 pcs. 32Mbit flash memory.

? Flash Memory Power Down or write protect control support. - Dont power down the flash memory chip which used to store firmware

? Flash Memory Ready/Busy status detect.

? Inverted data bus control to reduce program operation in DOS FAT and ECC code field.

? Optional store firmware in flash memory array w/o externalROM. - Shadow ROM control to allow code fetch during data program or erase

? Media speed is upto 8MB/sec, sustain read data rate and 125KB/sec write data rate.

Buffer RAM control

? Dual port circular Buffer RAM control

? 1KB data Buffer RAM.

? Automatically correct error data in Buffer RAM.

- Single word error correct and double word detect.

? Provide logic to speed up Buffer RAM access.

? Support 8 bit as well as 16 bit transfer on host bus.

DSP core

? High performance MX93011 DSP (21Mips) core.

? 4KB Internal RAM(direct access).

? 2KB Internal expansion RAM(indirect access) for store data or shadow ROM space.

? ICE debugging mode supported to ease system verification.

? Lower power and automatic power saving operation

Technology

? 128 pin LQFP

? 0.6um Low-power, High-speed CMOS technology.

? 5V±10 or 3.3V±5

Utility Support

? Upload firmware from Host.

? Physical Devices test.

? Preformat.

? CIS Manufacturer code and Model code edit.