N64T1630C1BZ中文資料NANOAMP數(shù)據(jù)手冊PDF規(guī)格書

Overview

The N64T1630C1B is an integrated memory

device containing a 64 Mbit Pseudo Static Random

Access Memory using a self-refresh DRAM array

organized as 4,194,304 words by 16 bits. It is

designed to be compatible in operation and

interface to standard 6T SRAMS. The device is

designed for low standby and operating current

and includes a power-down feature to

automatically enter standby mode.

Features

? Dual voltage rails for optimum power & performance

Vcc - 2.7V - 3.3V

Vccq - 2.7V to 3.3V

? Fast Cycle Times

TACC < 70 nS (60ns future)

TPACC < 25 nS

? Very low standby current

ISB < 170μA

? Very low operating current

Icc < 25mA

? PASR (Partial Array Self Refresh)

? TCR (Temperature Compensated Refresh)