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N74F2952D中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

N74F2952D
廠(chǎng)商型號(hào)

N74F2952D

功能描述

Registered transceiver, non-inverting 3-State

文件大小

142.74 Kbytes

頁(yè)面數(shù)量

14 頁(yè)

生產(chǎn)廠(chǎng)商 NXP Semiconductors
企業(yè)簡(jiǎn)稱(chēng)

Philips飛利浦

中文名稱(chēng)

荷蘭皇家飛利浦官網(wǎng)

原廠(chǎng)標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠(chǎng)下載

更新時(shí)間

2025-1-18 17:08:00

N74F2952D規(guī)格書(shū)詳情

DESCRIPTION

The 74F2952 and 74F2953 are 8-bit registered transceivers. Two 8-bit back-to-back registers store data flowing in both directions between two bi-directional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (CPXX) provided that the Clock Enable (CEXX) is Low. The data is then present at the 3-State output buffers, but is only accessible when the Output Enable (OEXX) is Low. Data flow from ‘A’ inputs to ‘B’ outputs is the same as for ‘B’ inputs to ‘A’ outputs.

FEATURES

? 8-bit registered transceivers

? Two 8-bit, back-to-back registers store data moving in both directions between two bidirectional buses

? Separate Clock, Clock Enable and 3-State Enable provided for each register

? 74F2952 non-inverting

? 74F2953 inverting

? AM2952/2953 functional equivalent

? ‘A’ outputs sink 24mA and source 3mA

? ‘B’ outputs sink 64mA and source 15mA

? 300 mil wide 24-pin Slim DIP package

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
NXP
SOP
699839
集團(tuán)化配單-有更多數(shù)量-免費(fèi)送樣-原包裝正品現(xiàn)貨-正規(guī)
詢(xún)價(jià)
PHILIPS
23+
NA
1231
專(zhuān)做原裝正品,假一罰百!
詢(xún)價(jià)
SIGNETICS
1948+
DIP-24
6852
只做原裝正品現(xiàn)貨!或訂貨假一賠十!
詢(xún)價(jià)
PHI
22+23+
DIP-24
37679
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨
詢(xún)價(jià)
NXP
589220
16余年資質(zhì) 絕對(duì)原盒原盤(pán) 更多數(shù)量
詢(xún)價(jià)
NXP
1050+
SOP
476
一級(jí)代理,專(zhuān)注軍工、汽車(chē)、醫(yī)療、工業(yè)、新能源、電力
詢(xún)價(jià)
PHILIPS/飛利浦
1535+
6026
詢(xún)價(jià)
PHI
24+
SMD
3000
公司存貨
詢(xún)價(jià)
PHI
2023+
DIP-24
50000
原裝現(xiàn)貨
詢(xún)價(jià)
PHILIPS/飛利浦
22+
DIP-24
9600
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單!
詢(xún)價(jià)