N74F8962Y中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書
| 廠商型號 |
N74F8962Y |
| 功能描述 | 9-Bit latched bidirectional Futurebus transceivers open-collector |
| 文件大小 |
97.23 Kbytes |
| 頁面數(shù)量 |
10 頁 |
| 生產(chǎn)廠商 | NXP Semiconductors |
| 企業(yè)簡稱 |
Philips【飛利浦】 |
| 中文名稱 | 荷蘭皇家飛利浦官網(wǎng) |
| 原廠標(biāo)識 |  |
| 數(shù)據(jù)手冊 | |
| 更新時間 | 2025-3-12 22:50:00 |
| 人工找貨 | N74F8962Y價(jià)格和庫存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
N74F8962Y規(guī)格書詳情
DESCRIPTION
The 74F8962 and 74F8963 are octal bidirectional latched transceivers and are intended to provide the electrical interface to a high performance wired-OR bus. The B port inverting drivers are low-capacitance open collector with controlled ramp and are designed to sink 100mA from 2 volts. The B port inverting receivers have a 150mV threshold region.
FEATURES
? Octal latched transceiver
? Drives heavily loaded backplanes with equivalent load impedances down to 10?
? High drive (100mA) open collector drivers on B port
? Reduced voltage swing (1 volt) produces less noise and reduces power consumption
? High speed operation enhances performance of backplane buses and facilitates incident wave switching
? Compatible with IEEE 896 futurebus standards
? Built–in precision band–gap reference provides accurate receiver thresholds and improved noise immunity
? Multiple GND pins minimize ground bounce
? Glitch–free power up/power down operation
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
PHIL |
23+ |
NA |
6500 |
全新原裝假一賠十 |
詢價(jià) | ||
PHILIPS |
09+ |
SOP |
1804 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
INTEGRAL |
24+ |
NA |
990000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
PHILIPS |
1715+ |
SOP |
251156 |
只做原裝正品現(xiàn)貨假一賠十! |
詢價(jià) | ||
SIG |
23+ |
NA |
666 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
PHI |
24+ |
SOP |
7500 |
絕對原裝自家現(xiàn)貨!真實(shí)庫存!歡迎來電! |
詢價(jià) | ||
SIG |
1978 |
200 |
原裝正品現(xiàn)貨庫存價(jià)優(yōu) |
詢價(jià) | |||
PHILIPS |
23+ |
SOIC |
12300 |
詢價(jià) | |||
PHI |
24+ |
9850 |
公司原裝現(xiàn)貨/隨時可以發(fā)貨 |
詢價(jià) | |||
N74H20 |
30 |
30 |
詢價(jià) |
