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NJ8821MADG中文資料ZARLINK數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

NJ8821MADG
廠商型號(hào)

NJ8821MADG

功能描述

FREQUENCY SYNTHESISER (MICROPROCESSOR INTERFACE) WITH RESETTABLE COUNTERS

文件大小

475.38 Kbytes

頁(yè)面數(shù)量

10 頁(yè)

生產(chǎn)廠商 Zarlink Semiconductor
企業(yè)簡(jiǎn)稱

ZARLINK

中文名稱

Zarlink Semiconductor官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-2-3 16:00:00

NJ8821MADG規(guī)格書(shū)詳情

The NJ8821 is a synthesiser circuit fabricated on the GPS CMOS process and is capable of achieving high sideband attenuation and low noise performance. It contains a reference oscillator, 11-bit programmable reference divider, digital and sample-and-hold comparators, 10-bit programmable ‘M’ counter, 7-bit programmable ‘A’ counter and the necessary control and latch circuitry for accepting and latching the input data.

FEATURES

■ Low Power Consumption

■ Microprocessor Compatible

■ High Performance Sample and Hold Phase Detector

■ >10MHz Input Frequency

產(chǎn)品屬性

  • 型號(hào):

    NJ8821MADG

  • 制造商:

    ZARLINK

  • 制造商全稱:

    Zarlink Semiconductor Inc

  • 功能描述:

    FREQUENCY SYNTHESISER(MICROPROCESSOR INTERFACE) WITH RESETTABLE COUNTERS

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