NMUX1308PW-Q100中文資料安世數(shù)據(jù)手冊PDF規(guī)格書

1. General description

The NMUX1308-Q100 is a general purpose, CMOS, bi-directional, 8 channel analog switch, with

an operating voltage range of 1.5 V to 5.5 V. The NMUX1308-Q100 is dual source compatible with

existing 4851 and 4051 devices. The NMUX1308-Q100 extends the digital logic thresholds to be

compatible with 1.8 V systems without the need for voltage translation.

The analog signal pins are comprised of a common input/output (Z) and eight independent

inputs/outputs (Y0 to Y7). All analog signal pins are bi-directional and support a voltage range from

GND to VCC.

All analog signal pins integrate injection current control circuitry. This control circuitry isolates

overvoltage spikes on disconnected analog signal pins from coupling to the connected analog

signal path, thereby preserving measurement accuracy. Additionally, this integration makes the use

of external overvoltage clamp components (e.g. resistive diode network) unnecessary.

There are four control signal pins (S0, S1, S2, and E). S0, S1, and S2 determine the analog

channels to connect between Z and Yn. E can be used to override S0, S1, and S2, disconnecting

all analog channels.

The control signal pins support 1.8 V logic thresholds across all operating voltages. In addition,

these pins are 5.5 V tolerant, enabling up to 5.5 V operation independent of supply voltage.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? SP8T-Z functionality

? Wide operating range: 1.5 V to 5.5 V

? Rail-to-Rail operation on analog signal pins

? Injection current control

? 1.8 V digital logic thresholds

? Digital pins compatible with 1.8 V logic thresholds across full VCC range

? Removes need for up-translation device for compatibility with low voltage GPIOs

? Ioff circuitry

? Enables wider latitude for power sequencing considerations

? Isolates backflow between supply rail and any biased digital/analog input when VCC = 0 V

? Prevents any biased digital/analog input from backpowering VCC when VCC = 0 V

? Maintains Hi-Z state of analog switch when VCC = 0 V

? 5.5 V overvoltage tolerant digital inputs

? Supports switching of 5.5 V digital signals across full VCC operating range

? Removes need for down-translation when switching thresholds are met

? Pin compatible with industry standard 4051 and 4851 analog switch products

? ESD protection:

? HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

? CDM: ANSI/ESDA/JEDEC JS-002 class C2b exceeds 750 V

? DHVQFN package with Side-Wettable Flanks enabling Automated Optical Inspection (AOI) of

solder joints

3. Applications

? Body control module

? Battery management system

? Automotive head unit