OP07J中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The OP07 has very low input offset voltage (75 μV maximum for OP07E) that is obtained by trimming at the wafer stage. These low offset voltages generally eliminate any need for external nulling. The OP07 also features low input bias current (±4 nA for the OP07E) and high open-loop gain (200 V/mV for the OP07E).

The low offset and high open-loop gain make the OP07 particularly useful for high gain instrumentation applications.

FEATURES

Low VOS: 75 μV maximum

Low VOSdrift: 1.3 μV/°C maximum

Ultrastable vs. time: 1.5 μV per month maximum

Low noise: 0.6 μV p-p maximum

Wide input voltage range: ±14 V typical

Wide supply voltage range: 3 V to 18 V

125°C temperature-tested dice

APPLICATIONS

Wireless base station control circuits

Optical network control circuits

Instrumentation

Sensors and controls

Thermocouples

Resistor thermal detectors (RTDs)

Strain bridges

Shunt current measurements

Precision filters