P89LPC9107FDH中文資料恩智浦數(shù)據(jù)手冊PDF規(guī)格書

General description

The P89LPC9102/9103/9107 are single-chip microcontrollers in low-cost 10-pin and 14-pin packages based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC9102/9103/9107 in order to reduce component count, board space, and system cost.

Features

Principal features

■ 1 kB byte-erasable flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.

■ 128-byte RAM data memory.

■ Two 16-bit timer/counters (P89LPC9102/9107). Two 16-bit timers (P89LPC9103)

■ 23-bit system timer that can also be used as a RTC.

■ Four input multiplexed 8-bit A/D converter/single DAC output. One analog comparator with selectable reference.

■ Enhanced UART with fractional baud rate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities (P89LPC9103/9107).

■ High-accuracy internal RC oscillator option, factory calibrated to 1 , allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.

■ VDD operating range of 2.4 V to 3.6 V with 5 V tolerant I/O pins (may be pulled up or driven to 5.5 V).

■ Up to 10 (P89LPC9107) or eight (P89LPC9102/9103) I/O pins when using internal oscillator and reset options.

■ Ultra-small 10-pin HVSON package (P89LPC9102/9103). 14-pin TSSOP and DIP packages (P89LPC9107).