P89LPC9321FN中文資料恩智浦數據手冊PDF規(guī)格書

General description

The P89LPC9321 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC9321 in order to reduce component count, board space, and system cost.

Features

Principal features

■ 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages.

Single-byte erasing allows any byte(s) to be used as non-volatile data storage.

■ 256-byte RAM data memory and a 512-byte auxiliary on-chip RAM.

■ 512-byte customer data EEPROM on-chip allows serialization of devices, storage of setup parameters, etc.

■ Two analog comparators with selectable inputs and reference source.

■ Single Programmable Gain Amplifier (PGA) with selectable gains of 2x, 4x, 8x, or 16x can be applied to analog comparator inputs.

■ Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).

■ A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.

■ Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.

■ Capture/Compare Unit (CCU) provides PWM, input capture, and output compare functions.

■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).

■ 4-level low voltage (brownout) detect allows a graceful system shutdown when power fails. May optionally be configured as an interrupt.

■ 28-pin TSSOP, PLCC and DIP packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.