Key Features

MCU

? 50MHz Arm? Cortex?-M0

o 32kB FLASH

o 8kB SRAM

o 256B INFO FLASH for manufacturing information

o 20 interrupts, 4 priority levels

? SWD programming interface

? Clock-gating for low-power operation

MCU ADC

? 10-bit 1MSPS SAR ADC

? Dual 8-channel ADC sequencer

Timing Generators

? Four 16-bit PWM timers with up to 8 CCR output units each

? 24-bit SysTick count-down timer

? Watch-dog Timer (WDT)

? AFE Windowed Watch-dog Timer (WWDT) running off independent clock

IO

? 3.3V/5V configurable drive output

? 17 general-purpose IO

? Digital Input, digital output, analog ADC input

? Configurable weak pull-up or pull-down

? Configurable drive-strength (8mA or 16mA)

? Flexible interrupt controller

Communication Peripherals

? UART or SPI and I2C/SMBus

? 8-bit UART, up to 1Mbps

? 3-wire or 4-wire SPI, master/slave

? I2C master/slave, 7b/10b

? Single-wire debugger (SWD)

Power Manager

? Up to 145V supply input Buck DC/DC Controller

o OC, OV and UV protection

? High-Voltage Charge Pump

? 5V/225mA system regulator

? Integrated LDOs for analog, IO, and core supplies

? Power and temperature monitor, warning, and fault detection

? Low-Power Operation

o 3μA total hibernate mode

o Push Button, PACK+ Charger Detect, and Timer wakeup modes

Configurable Analog Front-End (CAFETM)

? Programmable-Gain Differential amplifier and 16-bit Sigma-Delta ADC for battery pack current sense

? 16-bit Sigma-Delta ADC for voltage sense

? Integrated ADC references

? Programmable over-current shutdown

? Power supply monitoring via ADC

? Low-speed independent clock source

Application Specific Power Drivers (ASPDTM)

? Integrated high-side gate drivers for external CHG and DSG FETs

? Integrated low-side gate driver for pack FUSE blow FET

Integrated Cell Balancing

? Cell balancing for 20 cells up to 50mA

Packaging

? QFN 9x9mm 60-pin package, 0.5mm pitch

? Exposed pad for thermal management

Certifications

? TA = -40°C to 105°C