PAC5524QF-T中文資料QORVO數(shù)據(jù)手冊(cè)PDF規(guī)格書

Features

Multi-Mode Power ManagerTM (MMPM)

? Optional multi-mode switching supply controller configurable for DC/DC Buck or SEPIC topologies

? Direct DC supply up to 20V

? Integrated LDOs for MCU core, IO, analog with power and hibernate management

? Power and temperature monitor, warning and fault detection

? Low-power total hibernate mode, IQ = 18μA

Configurable Analog Front-EndTM (CAFE)

? 3 Differential Programmable-gain Amplifiers

? 4 Single-ended Programmable-gain Amplifiers

? 2.5V ADC reference

? Programmable over-current shutdown

? Hibernate push-button wake-up

? Power supply monitoring via ADC

Application Specific Power DriversTM (ASPD)

? Integrated level shifters and pre-drivers

? 3 Low-side and 3 High-Side gate drivers with 1.5A gate driving capacity

? Break-before-make (BBM) hardware dead-time enforcement to prevent shoot-through

? Configurable propagation delay and fault protection

? OC, UV protection

MCU

? 150MHz Arm? Cortex?-M4F MCU

? Hardware multiplier and divider

? Single-precision Floating Point Unit (FPU)

? Nested Vectored Interrupt Controller (NVIC) with 32 interrupts and 8 priority levels

? Clock-gating for low-power operation

? Embedded Trace Macrocell (ETM) for in-system debugging in real-time without breakpoints

Memory

? 128kB FLASH, 32kB SRAM with ECC

? 2 x 1kB INFO FLASH for manufacturing information

? 1 x 1kB INFO FLASH for user parameter storage and application configuration code

? 4-level user-configurable code protection

ADC

? 12-bit 2.5MSPS SAR ADC

? Dynamic Triggering and Sequence Engine (DTSE)

o Up to 16 configurable sequences

o Dedicated memory for conversion results

IO

? 3.3V digital input/output or analog input for ADC

? Configurable weak pull-up or pull-down

? Configurable drive strength (6mA to 25mA minimum)

? Flexible peripheral MUX allowing each IO pin to select from up to 8 peripheral functions

? Flexible interrupt controller

Flexible Clock Control System (CCS)

? 300MHz PLL from internal 2 oscillator

? 20MHz ring oscillator

? Optional 20MHz external clock input

Timing Generators

? Four 16-bit PWM timers with up to 8 CCR output units each

? 24-bit SysTick count-down timer

? Windowed Watch-dog Timer (WWDT)

? 24-bit Real-Time Clock (RTC) with calendar and alarm

? 2 x 24-bit General-purpose count-down timers with interrupt

? Hibernate wake-up timer for sleep modes from 0.125s to 8s

Communication Peripherals

? 3 x USART (UART or SPI)

? I2C master/slave

? SPI master/slave, up to 25MHz

? CAN 2.0B Controller

? SWD or JTAG serial debug interfaces

? Embedded Trace Macrocell (ETM)

8b/16b CRC Engine

96-bit Unique ID

Physical

? TA = -40C to 125C

? QFN 8x8mm 64-pin package

o Exposed pad for thermal management