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PDSP16116MCGC1R中文資料ZARLINK數(shù)據(jù)手冊PDF規(guī)格書
PDSP16116MCGC1R規(guī)格書詳情
The PDSP16116A will multiply two complex (16 + 16) bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The data format is fractional twos complement.
FEATURES
■ Complex Number (16 + 16) X (16 + 16) Multiplication
■ Full 32 bit Result
■ 20MHz Clock Rate
■ Block Floating Point FFT Butterfly Support
■ -1 times -1 Trap
■ Twos Complement Fractional Arithmetic
■ TTL Compatible I/O
■ Complex Conjugation
■ 2 Cycle Fall Through
■ 144 pin PGA or QFP packages
APPLICATION
■ Fast Fourier Transforms
■ Digital Filtering
■ Radar and Sonar Processing
■ Instrumentation
■ Image Processing
產(chǎn)品屬性
- 型號:
PDSP16116MCGC1R
- 制造商:
ZARLINK
- 制造商全稱:
Zarlink Semiconductor Inc
- 功能描述:
16 by 16 Bit Complex Multiplier
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
2020+ |
PGA |
80000 |
只做自己庫存,全新原裝進口正品假一賠百,可開13%增 |
詢價 | |||
GPS |
CPGA144 |
699839 |
集團化配單-有更多數(shù)量-免費送樣-原包裝正品現(xiàn)貨-正規(guī) |
詢價 | |||
MT |
589220 |
16余年資質(zhì) 絕對原盒原盤 更多數(shù)量 |
詢價 | ||||
ZARLINK |
10+ |
原廠封裝 |
345 |
宇航IC只做原裝假一罰十 |
詢價 | ||
ZAR |
24+ |
1 |
詢價 | ||||
MT |
0 |
459 |
原裝正品 |
詢價 | |||
18+ |
PGA |
300 |
進口原裝正品優(yōu)勢供應 |
詢價 | |||
MT |
0 |
10 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | |||
GPS |
23+ |
PGA |
1008 |
特價庫存 |
詢價 | ||
2318+ |
PGA |
4862 |
只做進口原裝!假一賠百!自己庫存價優(yōu)! |
詢價 |