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PDSP16488AB0中文資料ZARLINK數(shù)據(jù)手冊(cè)PDF規(guī)格書

PDSP16488AB0
廠商型號(hào)

PDSP16488AB0

功能描述

Single Chip 2D Convolver with Integral Line Delays

文件大小

462.03 Kbytes

頁(yè)面數(shù)量

33 頁(yè)

生產(chǎn)廠商 Zarlink Semiconductor
企業(yè)簡(jiǎn)稱

ZARLINK

中文名稱

Zarlink Semiconductor官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-2-3 23:00:00

PDSP16488AB0規(guī)格書詳情

The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional convolution between the pixels within a video window and a set of stored coefficients. An internal multiplier accumulator array can be multi-cycled at double or quadruple the pixel clock rate. This then gives the window size options listed in Table 1.

FEATURES

■ The PDSP16488A is a replacement for the PDSP16488 (see Note below)

■ 8 or 16-bit Pixels with rates up to 40 MHz

■ Window Sizes up to 838 with a Single Device

■ Eight Internal Line Delays

■ Supports Interlace and Frame-to-Frame Operations

■ Coefficients Supplied from an EPROM or Remote Host

■ Expandable in both X and Y for Larger Windows

■ Gain Control and Pixel Output Manipulation

■ 84-pin PGA or 132-pin QFP Package Options

產(chǎn)品屬性

  • 型號(hào):

    PDSP16488AB0

  • 制造商:

    ZARLINK

  • 制造商全稱:

    Zarlink Semiconductor Inc

  • 功能描述:

    Single Chip 2D Convolver with Integral Line Delays

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
N/A
23+
NA/
3264
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詢價(jià)
GPS
2020+
PGA
80000
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GPS
QQ咨詢
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96
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ZARLINK
10+
原廠封裝
34
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N/A
18+
NA
300
進(jìn)口原裝正品優(yōu)勢(shì)供應(yīng)
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GPS
PGA
20
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詢價(jià)
GPS
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4862
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詢價(jià)
GPS
23+
PGA
10000
原裝正品現(xiàn)貨
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2023+
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GPS
21+
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645
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