PEEL18LV8Z-15中文資料易亨電子數(shù)據(jù)手冊PDF規(guī)格書

General Description

The PEEL18LV8Z is a Programmable Electrically Erasable Logic (PEEL) SPLD (Simple Programmable Logic Device) that operates over the supply voltage range of 2.7V-3.6V and features ultra-low, automatic zero power-down operation. The PEEL18LV8Z is logically and functionally similar to Anachips 5V PEEL18CV8 and PEEL18CV8Z. The zero power (25 μA max. Icc) power-down mode makes the PEEL18LV8Z ideal for a broad range of batterypowered portable equipment applications, from hand-held meters to PCMCIA modems. EE-reprogrammability provides both the convenience of fast reprogramming for product development and quick product personalization in manufacturing, including Engineering Change Orders.

Features

? Low Voltage, Ultra Low Power Operation

- Vcc = 2.7 to 3.6 V

- Icc = 5 μA (typical) at standby

- Icc = 1.5 mA (typical) at 1 MHz

- Meets JEDEC LV Interface Spec (JEDSD8-A)

- 5 Volts tolerant inputs and I/O’s

? CMOS Electrically Erasable Technology

- Superior factory testing

- Reprogrammable in plastic package

- Reduces retrofit and development costs

? Application Versatility

- Replaces random logic

- Super set of standard PLDs

- Pin and JEDEC compatible with 16V8

- Ideal for battery powered systems

- Replaces expensive oscillators

? Architectural Flexibility

- Enhanced architecture fits in more logic

- 113 product terms x 36 input AND array

- 10 inputs and 8 I/O pins

- 12 possible macrocell configurations

- Asynchronous clear, Synchronous preset

- Independent output enables

- Programmable clock; pin 1 or p-term

- Programmable clock polarity

- 20 Pin DIP/SOIC/TSSOP and PLCC

- Schmitt triggers on clock and data inputs

? Schmitt Trigger Inputs

- Eliminates external Schmitt trigger devices

- Ideal for encoder designs