PI6C2308A中文資料百利通數(shù)據(jù)手冊(cè)PDF規(guī)格書

Functional Description

Providing two banks of four outputs, the PI6C2308A is a 3.3V zero delay buffer designed to distribute clock signals in applications including PC, workstation, datacom, telecom, and high-performance systems. Each bank of four outputs can be controlled by the select inputs as shown in the Select Input Decoding Table.

Product Features

? 10 MHz to 140 MHz operating range

? Zero input-output propagation delay, adjustable by capacitive load on FBK input

? Multiple configurations, see Available PI6C2308A Configurations table

? Input to output delay, less than 150ps

? Multiple low skew outputs

- Output-output skew less than 200ps

- Device-device skew less than 500ps

- Two banks of four outputs, Hi-Z by two select inputs

? Low Jitter, less than 200ps

? 3.3V operation

? Available in industrial &commercial temperatures

? Packages:

- Space-saving 16-pin, 150-mil SOIC (W)

- 16-pin TSSOP (L)