PI6C2405A集成電路（IC）的時鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料

Description

The PI6C2405A is a PLL based, zero-delay buffer, with the ability to distribute five outputs of up to 133MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL.

An internal feedback on OUT0 is used to synchronize the outputs to the input; the relationship between loading of this signal and the outputs determines the input-output delay. PI6C2405A is able to track spread spectrum clocking for EMI reduction. PI6C2405A is characterized for both commercial and industrial operation.

PI6C2405A-1H is a high-drive version of PI6C2405A-1

Features

? Maximum rated frequency: 133 MHz

? Low cycle-to-cycle jitter

? Input to output delay, less than 300ps

? Internal feedback allows outputs to be synchronized to the clock input

? 5V tolerant input*

? Spread spectrum clock ready

? Operates at 3.3V VDD

? Packaging (Pb-free & Green available):

-8-pin, 150-mil SOIC (W)

-8-pin, 173-mil TSSOP (L)