PI6C3Q991-2J中文資料百利通數(shù)據(jù)手冊(cè)PDF規(guī)格書

Description

The PI6C3Q99X family is a high fanout 3.3V PLL-based clock driver intended for high performance computing and data-communications applications. A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal. The PI6C3Q991 has 8 programmable skew outputs in 4 banks of 2, while the PI6C3Q993 has 6 programmable skew outputs and 2 zero skew outputs. Skew is controlled by 3-level input signals that may be hardwired to appropriate HIGH-MID-LOW levels.

Features

? PI6C3Q99X family provides following products: PI6C3Q991: 32-pin PLCC version PI6C3Q993: 28-pin QSOP version

? Inputs are 5V I/O Tolerant

? 4 pairs of programmable skew outputs

? Low skew: 200ps same pair; 250ps all outputs

? Selectable positive or negative edge synchronization: Excellent for DSP applications

? Synchronous output enable

? Output frequency: 3.75 MHz to 85 MHz

? 2x, 4x, 1/2, and 1/4 outputs

? 3 skew grades:

? 3-level inputs for skew and PLL range control

? PLL bypass for DC testing

? External feedback, internal loop filter

? 12mA balanced drive outputs

? Low Jitter: < 200ps peak-to-peak

? Industrial temperature range

? Pin-to-pin compatible with IDT QS5V991 and QS5V993

? Available in 32-pin PLCC and 28-pin QSOP