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PIC24FJ192GA110-I中文資料微芯科技數(shù)據(jù)手冊PDF規(guī)格書

PIC24FJ192GA110-I
廠商型號

PIC24FJ192GA110-I

功能描述

PIC24FJ256GA110 Family Data Sheet

文件大小

2.66745 Mbytes

頁面數(shù)量

330

生產(chǎn)廠商 Microchip Technology
企業(yè)簡稱

Microchip微芯科技

中文名稱

微芯科技股份有限公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-3-11 9:02:00

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PIC24FJ192GA110-I規(guī)格書詳情

Special Microcontroller Features:

? Operating Voltage Range of 2.0V to 3.6V

? Self-Reprogrammable under Software Control

? 5.5V Tolerant Input (digital pins only)

? Configurable Open-Drain Outputs on Digital I/O

? High-Current Sink/Source (18 mA/18 mA) on all I/O

? Selectable Power Management modes:

- Sleep, Idle and Doze modes with fast wake-up

? Fail-Safe Clock Monitor Operation:

- Detects clock failure and switches to on-chip FRC oscillator

? On-Chip LDO Regulator

Power Management:

? On-Chip 2.5V Voltage Regulator

? Switch between Clock Sources in Real Time

? Idle, Sleep and Doze modes with Fast Wake-up and

Two-Speed Start-up

? Run mode: 1 mA/MIPS, 2.0V Typical

? Standby Current with 32 kHz Oscillator: 2.6 ?A, 2.0V Typical

? Power-on Reset (POR), Power-up Timer (PWRT),

Low-Voltage Detect (LVD) and Oscillator Start-up Timer

(OST)

? Flexible Watchdog Timer (WDT) with On-Chip

Low-Power RC Oscillator for Reliable Operation

? In-Circuit Serial Programming? (ICSP?) and

In-Circuit Debug (ICD) via 2 Pins

? JTAG Boundary Scan Support

? Brown-out Reset (BOR)

? Flash Program Memory:

- 10,000 erase/write cycle endurance (minimum)

- 20-year data retention minimum

- Selectable write protection boundary

- Write protection option for Flash Configuration Words

High-Performance CPU:

? Modified Harvard Architecture

? Up to 16 MIPS Operation at 32 MHz

? 8 MHz Internal Oscillator

? 17-Bit x 17-Bit Single-Cycle Hardware Multiplier

? 32-Bit by 16-Bit Hardware Divider

? 16 x 16-Bit Working Register Array

? C Compiler Optimized Instruction Set Architecture with Flexible Addressing modes

? Linear Program Memory Addressing, Up to 12 Mbytes

? Linear Data Memory Addressing, Up to 64 Kbytes

? Two Address Generation Units for Separate Read and Write Addressing of Data Memory

Analog Features:

? 10-Bit, Up to 16-Channel Analog-to-Digital (A/D) Converter at 500 ksps:

- Conversions available in Sleep mode

? Three Analog Comparators with Programmable Input/Output Configuration

? Charge Time Measurement Unit (CTMU)

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