PLDC20G10-35JC中文資料賽普拉斯數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Functional Description

Cypress PLD devices are high-speed electrically program mable logic devices. These devices utilize the sum-of-products (AND-OR) structure providing users the ability to program custom logic functions for unique requirements.

In an unprogrammed state the AND gates are connected via EPROM cells to both the true and complement of every input. By selectively programming the EPROM cells, AND gates may be connected to either the true or complement or disconnected from both true and complement inputs.

Features

? Fast

— Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns

— Military: tPD = 20 ns, tCO = 15 ns, tS = 15 ns

? Low power

— ICC max.: 70 mA, commercial

— ICC max.: 100 mA, military

? Commercial and military temperature range

? User-programmable output cells

— Selectable for registered or combinatorial operation

— Output polarity control

— Output enable source selectable from pin 13 or product term

? Generic architecture to replace standard logic functions including: 20L10, 20L8, 20R8, 20R6, 20R4, 12L10, 14L8, 16L6, 18L4, 20L2, and 20V8

? Eight product terms and one OE product term per output

? CMOS EPROM technology for reprogrammability

? Highly reliable

— Uses proven EPROM technology

— Fully AC and DC tested

— Security feature prevents logic pattern duplication

— ±10 power supply voltage and higher noise immunity