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PLHS501IA中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書

PLHS501IA
廠商型號(hào)

PLHS501IA

功能描述

Programmable macro logic PML

文件大小

84.76 Kbytes

頁面數(shù)量

12

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡(jiǎn)稱

Philips飛利浦

中文名稱

荷蘭皇家飛利浦官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-12-25 19:49:00

PLHS501IA規(guī)格書詳情

DESCRIPTION

The PLHS501 is a high-density Bipolar Programmable Macro Logic device. PML incorporates a programmable NAND structure. The NAND architecture is an efficient method for implementing any logic function. The SNAP software development system provides a user friendly environment for design entry. SNAP eliminates the need for a detailed understanding of the PLHS501 architecture and makes it transparent to the user. PLHS501 is also supported on the Philips Semiconductors SNAP software development systems.

FEATURES

? Programmable Macro Logic device

? Full connectivity

? TTL compatible

? SNAP development system:

– Supports third-party schematic entry formats

– Macro library

– Versatile netlist format for design portability

– Logic, timing, and fault simulation

? Delay per internal NAND function = 6.5ns (typ)

? Testable in unprogrammed state

? Security fuse allows protection of proprietary designs

產(chǎn)品屬性

  • 型號(hào):

    PLHS501IA

  • 制造商:

    PHILIPS

  • 制造商全稱:

    NXP Semiconductors

  • 功能描述:

    Programmable macro logic PML

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