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PLL2_C2中文資料阿爾特數(shù)據(jù)手冊PDF規(guī)格書

PLL2_C2
廠商型號

PLL2_C2

功能描述

Cyclone III Device Handbook

文件大小

7.30201 Mbytes

頁面數(shù)量

274

生產(chǎn)廠商 Altera Corporation
企業(yè)簡稱

Altera阿爾特

中文名稱

阿爾特拉公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-15 9:16:00

PLL2_C2規(guī)格書詳情

Cyclone III Device Family Overview

Cyclone? III device family offers a unique combination of high functionality, low power and low cost. Based on Taiwan Semiconductor Manufacturing Company (TSMC) low-power (LP) process technology, silicon optimizations and software features to minimize power consumption, Cyclone III device family provides the ideal solution for your high-volume, low-power, and cost-sensitive applications. To address the unique design needs, Cyclone III device family offers the following two variants:

■ Cyclone III—lowest power, high functionality with the lowest cost

■ Cyclone III LS—lowest power FPGAs with security

With densities ranging from about 5,000 to 200,000 logic elements (LEs) and 0.5 Megabits (Mb) to 8 Mb of memory for less than ? watt of static power consumption, Cyclone III device family makes it easier for you to meet your power budget. Cyclone III LS devices are the first to implement a suite of security features at the silicon, software, and intellectual property (IP) level on a low-power and high-functionality FPGA platform. This suite of security features protects the IP from tampering, reverse engineering and cloning. In addition, Cyclone III LS devices support design separation which enables you to introduce redundancy in a single chip to reduce size, weight, and power of your application.

This chapter contains the following sections:

■ “Cyclone III Device Family Features” on page 1–1

■ “Cyclone III Device Family Architecture” on page 1–6

■ “Reference and Ordering Information” on page 1–12

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